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1 complex instruction set computing
"The implementation of complex instructions in a microprocessor design so that they can be invoked at the assembly language level. The instructions can be very powerful, allowing for complicated and flexible ways of calculating such elements as memory addresses. All this complexity, however, usually requires many clock cycles to execute each instruction."English-Arabic terms dictionary > complex instruction set computing
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2 Itanium
"An Intel microprocessor that uses explicitly parallel instruction set computing and 64-bit memory addressing. ""Itanium-based"" refers to systems or platforms that are based on the Itanium processor. ""Itanium2-based"" refers to systems or platforms that are based on the Itanium2 processor. ""Itanium architecture-based"" refers to systems or platforms that are based on the Itanium and Itanium2 processors." -
3 x86-based
"Pertaining to the combination of a 32-bit Windows operating system and a microprocessor that natively supports the 32-bit x86 instruction set. Examples include Intel Pentium 4, AMD Athlon and VIA C7 processors."
См. также в других словарях:
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MMX (instruction set) — Pentium with MMX MMX is a single instruction, multiple data (SIMD) instruction set designed by Intel, introduced in 1996 with their P5 based Pentium line of microprocessors, designated as Pentium with MMX Technology .[1] … Wikipedia
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Instruction pipeline — Pipelining redirects here. For HTTP pipelining, see HTTP pipelining. Basic five stage pipeline in a RISC machine (IF = Instruction Fetch, ID = Instruction Decode, EX = Execute, MEM = Memory access, WB = Register write back). In the fourth clock… … Wikipedia
