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1 completely pipelined architecture
English-Russian dictionary of Information technology > completely pipelined architecture
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2 completely pipelined architecture
Большой англо-русский и русско-английский словарь > completely pipelined architecture
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3 completely pipelined architecture
Вычислительная техника: полностью конвейерная архитектураУниверсальный англо-русский словарь > completely pipelined architecture
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4 completely pipelined architecture
English-Russian dictionary of computer science and programming > completely pipelined architecture
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5 completely pipelined architecture
Англо-русский словарь компьютерных и интернет терминов > completely pipelined architecture
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6 completely pipelined architecture
English-Russian dictionary of terms that are used in computer games > completely pipelined architecture
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7 completely pipelined architecture
English-Russian information technology > completely pipelined architecture
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8 architecture
1) архитектура, структура2) структура ( конфигурация)•- architecture of degree d
- bit-map architecture
- bit-serial architecture
- capability architecture
- cell-block architecture
- cellurar architecture
- channel array architecture
- chip architecture
- coarse-grained architecture
- collapsed architecture
- completely pipelined architecture
- compose-time architecture
- computer architecture
- data flow architecture
- design-time architecture
- distributed architecture
- distributed function architecture
- divided word-line architecture
- domain-specific architecture
- duplex architecture
- dynamic architecture
- easy-to-test architecture
- evolutionary architecture
- expandable architecture
- fine-grained architecture
- flat-address architecture
- foundation architecture
- Harvard architecture
- high-level architecture
- highly parallel architecture
- instruction set architecture
- loosely coupled architecture
- massively parallel architecture
- microprogrammable architecture
- modular architecture
- multibus architecture
- multimicroprocessor architecture
- multiplexed isolation architecture
- multithread architecture
- multiuser architecture
- N-bit architecture
- network architecture
- office-document architecture
- onion skin architecture
- open architecture
- open systems architecture
- parallel architecture
- peer-to-peer architecture
- peripheral oriented architecture
- pipelined architecture
- real architecture
- reduction architecture
- register-oriented architecture
- run-time architecture
- scalable architecture
- sea-of-gate architecture
- server-based architecture
- single-address architecture
- slice architecture
- software architecture
- spatially organized architecture
- stack architecture
- superscalar architecture
- tagged-token architecture
- tag-token architecture
- tagged-data architecture
- tailored architecture
- tightly coupled architecture
- tissue architecture
- token-ring architecture
- tree-structured architecture
- two-address architecture
- unified architecture
- unified-bus architecture
- vertical architecture
- virtual architectureEnglish-Russian dictionary of computer science and programming > architecture
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9 полностью конвейерная архитектура
Большой англо-русский и русско-английский словарь > полностью конвейерная архитектура
См. также в других словарях:
Hazard (computer architecture) — Hazards are problems with the instruction pipeline in central processing unit (CPU) microarchitectures that potentially result in incorrect computation. There are typically three types of hazards: data hazards structural hazards control hazards… … Wikipedia
MIPS architecture — MIPS (originally an acronym for Microprocessor without Interlocked Pipeline Stages) is a RISC microprocessor architecture developed by MIPS Technologies. As of|1999|alt=By the late 1990s it was estimated that one in three RISC chips produced were … Wikipedia
Transport triggered architecture — The transport triggered architecture (TTA) is an application specific instruction set processor ( ASIP ) architecture template that allows easy customization of microprocessor designs. The basic idea of transport triggering is to allow programs… … Wikipedia
x86 — This article is about Intel microprocessor architecture in general. For the 32 bit generation of this architecture which is also called x86 , see IA 32. x86 Designer Intel, AMD Bits 16 bit, 32 bit, and/or 64 bit Introduced 1978 Design … Wikipedia
Instruction pipeline — Pipelining redirects here. For HTTP pipelining, see HTTP pipelining. Basic five stage pipeline in a RISC machine (IF = Instruction Fetch, ID = Instruction Decode, EX = Execute, MEM = Memory access, WB = Register write back). In the fourth clock… … Wikipedia
Reduced instruction set computer — The acronym RISC (pronounced risk ), for reduced instruction set computing, represents a CPU design strategy emphasizing the insight that simplified instructions which do less may still provide for higher performance if this simplicity can be… … Wikipedia
Central processing unit — CPU redirects here. For other uses, see CPU (disambiguation). An Intel 80486DX2 CPU from above An Intel 80486DX2 from below … Wikipedia
Microprocessor — Intel 4004, the first general purpose, commercial microprocessor A microprocessor incorporates the functions of a computer s central processing unit (CPU) on a single integrated circuit,[1] (IC) or at most a few integrated circuits … Wikipedia
Zilog Z80 — One of the first Z80 microprocessors manufactured; the date stamp is from June 1976. Produced 1976 Common manufacturer(s) Zilog … Wikipedia
NetBurst (microarchitecture) — The NetBurst microarchitecture, called P68 inside Intel, was the successor to the P6 microarchitecture in the x86 family of CPUs made by Intel. The first CPU to use this architecture was the Willamette core of the Pentium 4, released on November… … Wikipedia
Out-of-order execution — In computer engineering, out of order execution (OoOE or OOE) is a paradigm used in most high performance microprocessors to make use of instruction cycles that would otherwise be wasted by a certain type of costly delay. In this paradigm, a… … Wikipedia
